The use of temporary structures--particularly disposable sidewall spacers--during semiconductor fabrication has become relatively widespread. By definition, a disposable sidewall spacer is created from material that may be etched at a much faster rate than the materials from which permanent circuit structures are created. Typically, the use of disposable sidewall spacers is called for when spacers are required only temporarily during a particular fabrication step, and their later presence would hinder subsequent fabrication steps or device performance.
Process engineers at IBM Corporation have used organic polymer material to create disposable sidewall structures that may be easily dissolved with an organic solvent, without damaging existing semiconductor structures. Both U.S. Pat. No. 4,838,991, issued to William J. Cote, et al, and entitled "Process for Defining Organic Sidewall Structures", and U.S. Pat. No. 4,502,914, issued to Hans-Joachim Trumpp, et al, and entitled "Method of Making Structures With Dimensions in the Sub-Micrometer Range", are examples of this process technology.
Sidewall spacers are most commonly used during integrated circuit fabrication to offset source/drain implants from the edges of MOSFET gates. Although sidewall spacers have typically been left intact after source/drain implantation steps, there are compelling reasons to make the sidewall spacers either partially or completely disposable. A pair of processes which make use of partially or completely disposable sidewall spacers are briefly described below.
U.S. Pat. No. 4,745,086, issued to Stephen J. Consentino, et al, and entitled "Removable Sidewall Spacer for Lightly Doped Drain Formation Using One Mask Level and Differential Oxidation" describes a process whereby completely disposable sidewall spacers made from CVD tungsten or polysilicon are utilized to offset heavily-doped source/drain implants. Following removal of the disposable spacers, the lightly-doped source/drain implants are performed.
In the quest for ever greater circuit density, process engineers may decide to use partially-disposable spacers. For example, in certain DRAM processes involving stacked-cell designs, it may be advantageous to remove the disposable portion of a partially-disposable spacer following its use as an implant block, in order to enlarge the size of a buried contact opening between adjacent wordlines. Because the disposable portion of the partially-disposable spacer etches at a much faster rate than the non-disposable portion, the latter remains intact upon removal of the former. The non-disposable portion serves to insulate wordline sidewalls from stacked capacitive elements within individual memory cells. FIGS. 1 through 6 are representative of such a process.
Referring now to FIG. 1, a pair of adjacent wordlines have been created on a portion of an in-process silicon wafer. The leftmost wordline 11 is insulated from the substrate 12 by a gate oxide layer 13, while the rightmost wordline 14 is insulated from substrate 12 by a field oxide region 15. A first implant spacer layer 16 has been blanket deposited over the surface of the wafer, following which phosphorus is implanted to create lightlydoped source and drain regions 17. First implant spacer layer 16 may be TEOS CVD oxide, wet or dry thermallygrown oxide, silane CVD oxide, various other types of conventional oxide, or other dielectric material such as silicon nitride.
Referring now to FIG. 2, a second implant spacer layer 21 has been blanket deposited over the surface of the wafer.
Referring now to FIG. 3, first implant spacer layer 16 and second implant spacer layer 21 have been anisotropically etched in order to clear a region of substrate 12 between leftmost wordline 11 and rightmost wordline 14. Of the two implant spacer layers, only first implant spacer layer remnants 31 and second implant spacer layer remnants 32 remain. Arsenic is then implanted to create heavily-doped source and drain regions 33. It will be noticed that the width of the cleared substrate area 34 is very narrow. A buried contact must be made to this junction region within the substrate. Due to the narrowness of the cleared substrate area 34, it must be widened if successful contact is to be made to the substrate.
Referring now to FIG. 4, second implant spacer layer remnants 32 are removed, leaving first implant spacer layer remnants 31 intact. The deposition of a substrate-insulating layer 41, the function of which is to insulate the substrate in non-buried contact regions from subsequently-deposited conductive layers, follows.
Referring now to FIG. 5, substrate-insulating layer 41 is etched to the extent that a region of substrate 12 between leftmost wordline 11 and rightmost wordline 14 is cleared a second time. Due to the relative thinness of substrate-insulating layer 41 (compared with second implant spacer layer 21), the portion of substrate cleared the second time is much wider than the portion cleared prior to the heavily-doped source and drain implants.
Referring now to FIG. 6, a buried contact conductive layer 61 is blanket deposited over the surface of the wafer. Conductive layer 61 will ultimately be patterned and may serve as a storage node plate or a digit line for a DRAM cell capacitor.
The process described above is of interest because of the requirement that second implant spacer layer 21 must be removable without significantly etching the first implant spacer layer 16 and any exposed portions of field oxide regions 15. The ideal disposable structure material should have several characteristics: Firstly, it should be readily removable without damaging all other permanent structures that may be exposed during the removal process; secondly, it should deposit in a highly conformal manner; thirdly, it should be sufficiently dense to act as an implant block; fourthly, it should be both anisotropically and isotropically etchable, and fifthly, it should be a dielectric material that will not cause shorts and will not spike junctions if small amounts are not cleared from the circuitry.
Disposable structural materials used in prior art processes are far from ideal. If CVD tungsten or CVD polysilicon is utilized for disposable structures, failure to effect a complete removal of the material may cause shorting within the circuit. Other materials, including silicon nitride, have also been used as a disposable spacer materials. However, removal can not always be accomplished without significant damage to other existing structures.
What is needed is a temporary structure material that is a dielectric, can be deposited in a highly conformal manner, and that can be rapidly removed without significantly affecting permanent semiconductor structures, including those constructed from silicon dioxide.